Introduction

Vivace DnV is a digital ASIC/FPGA design and verification service provider. We offer onsite and remote services to our clients globally.

Founded by a team of 3 senior engineers each having 10+ years of experience in the industry and with more than 30 total successful tapeout experiences throughout their careers, Vivace DnV has the ability to deliver high-level digital design and verification solutions from concept to verified IPs.

Some of our previous areas of expertise are; digital control of mixed-signal ICs including low power PMICs, data acquisition and readout of imaging sensors, ADCs, communication & bus interface standards such as I2C, SPI, SPMI. Our team has hands on experience at block and top-level verification using UVM, directed and constrained random verification methodologies to achieve desired code and functional coverage metrics.

Please contact us and let us know how we can help in your IC design & verification activities.

More information about our services are listed below.

Digital Design Verification (DV)

• Verification Plan Generation
• Random and Direct Testing
• Code / Functional Coverage Analysis
• UNR Analysis
• Gate Level Simulation

• Tools: Eplanner, Incisive (NCSim), Emanager/vManager, Incisive Formal Verifier (IFV), Integrated Metrics Center (IMC), Certitude
• Languages and Methodologies: Verilog, SystemVerilog/UVM, SVA, C++, Perl

ASIC Digital Design

• Feasibility Analysis
• Spec Creation
• High Level Front-end Digital Design
• Lint Check
• CDC / RDC Check
• Timing Constraints Generation
• Pre/Post Layout STA
• Logic Equivalency Check

• Tools: Incisive (NCSim), Questa, Design Compiler, PrimeTime, Formality
• Languages and Methodologies: Verilog, SystemVerilog, C++, Python, TCL

FPGA Design

• Custom IP Design
• RTL Design and Implementation
• Synthesis
• Floorplanning
• Place & Route
• Emulation

• Tools: Xilinx Vivado, Lattice Diamond
• Languages and Methodologies: Verilog, SystemVerilog, TCL

Embedded Design

• Custom SoC Platform Design
• Bare-Metal Application Development
• Embedded Linux Customization
• Hardware Acceleration

• Tools: Xilinx Vivado & Vitis Design Suites, Petalinux Tools
• Languages and Methodologies: Verilog, SystemVerilog, C/C++, TCL, Python